The invention relates to carrier regeneration circuits for regenerating reference carriers principally from QAM (quadrature amplitude modulation) waves formed by a quadrature partial response modulation system.
Polyphase PSK (phase shift keying) systems are presently in use. Recently, polyphase multiple-valued modulation systems have been investigated in which modulation is effected simultaneously in phase and in amplitude in order to utilize more efficiently the available bandwidth. Among others, close attention has been given to a 9-valued polyphase modulation system in which signal vectors or QAM signals formed by the quadrature partial response modulation system are arranged in lattice or grid form (for example, see U.S. Pats. Nos. 3,845,412 and 4,055,727).
Such polyphase multiple-valued modulation systems as previously developed nonetheless have retained some difficulties in circuit construction although they have enabled transmission of an increased amount of information. Particularly, the carrier regeneration circuit in this type of system has involved problems not encountered in processing PSK signals. First, for correct phase demodulation of QAM signals such as will be described below with reference to FIG. 1 of the accompanying drawings, there is a restriction that the reference carrier regenerated must be locked in phase at a multiple of .pi./2 radians. Secondly, since the modulated wave has an AM component, the carrier wave signal as extracted through a conventional carrier regeneration circuit for polyphase PSK use also has an AM component. Because of this, in a carrier sync circuit employing a voltage-controlled oscillator, carrier jitter will be increased in the event that the input signal undergoes any frequency offset resulting in an adverse effect on the performance of the demodulated output and thus making it desirable that the AM component be adequately compensated for.
Various attempts have been made to solve these new problems involved in the modulation system concerned. Among others, a carrier regeneration circuit intended to alleviate the first-described problem has been proposed in U.S. Pat. No. 4,114,710. As disclosed therein, the carrier regeneration circuit includes a pair of phase detectors for phase detection of the modulated signal input with a reference carrier wave, full-wave rectifier means for full-wave rectification of the respective outputs of the phase detectors, decision circuits for discriminating the outputs of the full-wave rectifiers at respective predetermined levels and producing a two-valued signal, a probability decision circuit for deciding the probability of generation of the modulated signals in response to the outputs of the respective decision circuits, and a 4-phase carrier regenerator arranged to receive the modulated input signal and phase-shift the regenerated carrier wave having a phase ambiguity (false lock) of .pi./4 radians in response to the output of the probability decision circuit to lock the regenerated carrier wave at an integral multiple of .pi./2 radians. Further, the probability decision circuit includes a NOR gate operable in response to the outputs of the decision circuits, an integrating circuit for integrating the output of the NOR gate, a pulse generator, a discriminator operable in response to the output of the pulse generator to discriminate the output of the integrating circuit, flip-flop means for storing the output of the discriminator, and means for supplying the output of the NOR gate and flip-flop to an Exclusive-Or gate incorporated in the 4-phase carrier regenerator.
In such a previously known form of carrier regeneration circuit, the output signal from the NOR gate, which varies bit by bit, is a signal which still retains a phase ambiguity and must be utilized with this ambiguity, the probability decision circuit serving to detect a false lock to thereby produce an inversion command signal which is coupled to the Exclusive-Or gate for inversion of the output signal from the NOR gate. In this connection, the flip-flop is so arranged that there is no return of the inversion command signal to the flip-flop which would cause repeated production of such command signal. Further, the input to the flip-flop is reset to "1" at regular intervals under control of the output of the pulse generator in order to avoid any continuation of a state of false lock that may otherwise occur should the output of the flip-flop remain unchanged during the sync pulling-in process in dependence upon the state of the input thereto. The length of resetting period should be short for rapid correction of the false lock state. However, any excessively short length of resetting period will result in some disturbance in the output of the Exclusive-Or gate during the sync pulling-in process, thus exerting an adverse effect upon the process per se by causing an increase in the length of the sync pulling-in time. As for the integrating circuit, a lapse of time exceeding its time constant is required before the output of the flip-flop is established which again causes an increase in the length of the sync pulling-in time. In other words, use of the probability decision circuit results in an extended length of sync pulling-in time on account of its decision output which is not produced for every signal bit.
In summary, the previously-known form of carrier regeneration circuit has disadvantages in that the length of sync pulling-in time is increased in comparison with that of conventional carrier regeneration circuits for PSK modulated waves and in that its circuit design is complicated since design parameters such as the time constant of the integrating circuit and the output period of the pulse generator are extended.
Such disadvantages are attributed principally to the fact that the output of the NOR gate has an ambiguity due to pull-in phase, as described above, which can be overcome by generation of a signal having no such phase ambiguity and using it in place of the NOR gate output to drive the .pi./4 modulator (doubler) in the carrier regenerator.
For obtaining such drive signal, a method has been disclosed wherein, with reference to FIG. 1, there is a level difference of 2 times between vector signals 1.sub.1, a.sub.2, a.sub.3 and a.sub.4 and those b.sub.1, b.sub.2, b.sub.3 and b.sub.4 and wherein the input modulated wave is subjected to envelope detection to detect its AM component and the detection signal is discriminated to obtain a desired drive signal. As it is obtained directly from the input modulated wave, the drive signal has no ambiguity and can be used successfully to drive the .pi./4 modulator. This method of drive signal production nonetheless involves some deficiencies, as follows: Referring to FIG. 1, the distance of discrimination between vector signals a.sub.1 -a.sub.4 and b.sub.1 -b.sub.4 is AB=.beta.-.gamma.=(2-1) and that of main signals b.sub.1 -b.sub.4 at the output of the phase detector is OD=.gamma.. Thus, between the two distances, there is a difference of 20 log [.gamma.2-1)/.gamma.]=7.6 dB. This means that the bit error rate characteristic of the signal obtainable by the envelope detection method is 7.6 dB below the equivalent input C/N (where C and N represent the carrier and thermal noise levels, respectively). That is, even where the code error rate of the main signal as obtained from the decision circuits is of the order of 1.times.10.sup.-5, the detected output envelope has a code error rate on the order of 4.times.10.sup.-2. Use of a drive signal having such a bit error rate causes frequent changes in the pull-in phase or it results in an out-of-phase state, rendering the carrier regeneration circuit unstable and generally impracticable.
Substantially the same problems and deficiencies as described above are present also with an 8-valued rectangular polyphase modulated wave which does not include signal C in FIG. 1. (See the paper "Digital Amplitude-Phase Keying with M-ary Alphabets" by Thomas et al, IEEE Transactions on Communications, vol. COM-22, No. 2, February 1974, FIG. 2 (b)). For relevant carrier regeneration circuits for use in a multiple-valued polyphase modulation system, see U.S. Pats. Nos. 4,039,961 and 4,099,130.